One example of a conventional parallel image processing system is disclosed in Japanese Patent Publication No. 2839026 (patent document 1) and Japanese Laid-Open Patent Publication No. 2002-7359 (patent document 2). The conventional parallel image processing system is configured by a PE array in which great number of calculation element processors (Processor Element, hereinafter referred to as “PE”) are parallel connected one-dimensionally, and a controller for controlling the same. Each PE is configured by a calculating part (ALU) for performing the calculation process, a local memory for storing local pixel values of the image to be processed, and a register for holding a temporary calculation result.
When performing some kind of calculation on a specific row of the image to be processed stored in the local memory, the conventional parallel image processing system having such configuration reads the pixel value from the address corresponding to the specific row of the local memory, and stores the same in the register. Then, the pixel value stored in the register is read out, the calculation is performed in the ALU, and the calculation result is stored in the register. The calculation result stored in the register is stored in the specific row of the local memory. When the pixel value positioned at the periphery of the pixel to be processed is required in the calculation, the necessary pixel value is collected using a data transfer unit between the PEs, and the calculation is performed.
Japanese Laid-Open Patent Publication No. 2004-362086 (patent document 3) discloses an SIMD parallel processing system having a function of automatically performing repetitive execution of a PE command according to the parallelism of the PE to enhance the program efficiency in a case where the system does not have an optimum number of PEs in the image to be processed. In the parallel processing system, the number of repetitive executions is calculated from the parallelism information instructed by the program and the parallelism information of the SIMD calculator, and the automatic repetitive execution of the PE command is realized necessary number of times according to the number of PEs of the system.    Patent document 1: Japanese Patent Publication No. 2839026 (e.g., FIG. 1, paragraph 0008)    Patent document 2: Japanese Laid-Open Patent Publication No. 2002-7359 (e.g., FIG. 1, paragraphs 0014 to 0016)    Patent document 3: Japanese Laid-Open Patent Publication No. 2004-362086 (e.g., paragraphs 0011 to 0021, FIG. 1)